5 GHz MMIC Power Amplifier

• Main Authors: Chi-Chuan Liu, 劉啟全
• Other Authors: Shoou-Jinn Chang
• Format: Others
• Language: en_US
• Published: 2002
• Online Access: http://ndltd.ncl.edu.tw/handle/df5hf5

碩士 === 國立成功大學 === 微電子工程研究所碩博士班 === 90 === 　　In this thesis, it is proposed that a 5 GHz PHEMT MMIC power amplifier with only single dc supply for the wireless LAN applications is presented. 　　In this thesis, we discuss about basic theories in microwave circuit design and circuit design techniques. To meet the requirements of the system, we specify the power amplifier as follows: frequency range of 5~6 GHz, small-signal gain of 22 dB, output power at 1-dB gain compress point of 29 dBm, power efficiency of 25 %, and output IP3 of 39 dBm. In addition, we select the quiescent point of 8 V - 400 mA in class A operation. Furthermore, the chip is fabricated in Transcom, Inc’s GaAs-PHEMT process. 　　In the aspect of output power matching, we perform the output match network using the load-line theory (Cripps Method) and the small-signal model of PHEMT; In the aspect of bias network, we select a self-bias circuit to improve the disadvantages of dual-bias of PHEMTs; In the aspect of measurement, we use a FR-4 evaluation board to measure the performance of the MMIC PA, when it has been packaged. 　　Finally, we compare the discrepancies between the measured and simulated results and the specifications. 　　The MMIC power amplifier really presents well matched with the requirements for 5 GHz wireless LAN applications.