Low Power Testing for CMOS Logic Testing

Low Power Testing for CMOS Logic Testing

博士 === 國立成功大學 === 電機工程學系 === 90 === The increasing transistor density and operating speed in the system-on-a-chip (SOC) era make the power dissipation during test a critical issue. This dissertation proposes four techniques to reduce the power dissipation in test application time for CMOS...

Full description

Bibliographic Details
Main Authors:	Tsung-Chu Huang, 黃宗柱
Other Authors:	Kuen-Jong Lee
Format:	Others
Language:	en_US
Published:	2002
Online Access:	http://ndltd.ncl.edu.tw/handle/23446931835307075746

Similar Items

Mixing Pass-Transistor Logic with CMOS Logic for Low-Power Cell- Based Designs
by: Cho, Hamm-Min, et al.
Published: (1998)

Simple digital logic CMOS IC automatic test system
by: Bing-Sheng Liao, et al.
Published: (2008)

Simple digital logic CMOS IC automatic test system
by: Bing-Sheng Liao, et al.
Published: (2008)

Design of a Low-Power VLSI Cell Library Exploiting Different Types of CMOS Logic Circuits
by: Huang, Po-Shin, et al.
Published: (1998)

Design, Fabricate, and Test CMOS Process-Compatible MEMS Logic Gates
by: Tsai, Chun-Yin, et al.
Published: (2011)

CMOS gate delay, power measurements and characterization with logical effort and logical power
by: Wunderlich, Richard Bryan
Published: (2010)

Low power domino logic circuits in deep-submicron technology using CMOS
by: Sandeep Garg, et al.
Published: (2018-08-01)

Low Power Alternating Logic Testable CMOS Array Multiplier and Analog Estimator
by: Yeh, Ming-Chieh, et al.
Published: (1997)

Low Power Alternating Logic Testable CMOS Array Multiplier and Analog Estimator
by: Ye, Ming-Jie, et al.
Published: (1997)

CMOS image sensor test method
by: HUANG, PO-CHIA, et al.
Published: (2019)

An integrated low-cost functional tester for CMOS logic
by: Low, William
Published: (2009)

An integrated low-cost functional tester for CMOS logic
by: Low, William
Published: (2009)

Circuit Level Techniques for Power and Reliability Optimization of CMOS Logic
by: Diril, Abdulkadir Utku
Published: (2005)

The Subthreshold Behavior Model for the Multiple-Gate MOSFETs and Its Application for Low-Power CMOS Logic Gate
by: KO, YING-WEN, et al.
Published: (2018)

Synthesis and testing of programmable logic arrays
by: Huang, Guo Hao, et al.
Published: (1994)

Low Power Designs for CMOS and BiCMOS Circuits
by: Ke-Horng Chen, et al.
Published: (2003)

Low-Power CMOS Continuous-Time Filter Design
by: Huang Cheng-Chang, et al.
Published: (1998)

An Unipolar CMOS with Elevated Body and Spacer for Low Voltage Logic Gates Application
by: Yong-Huang Lin, et al.
Published: (2015)

Low-Power CMOS Static Random Access Memory Design
by: Huang, Chit-Keng, et al.
Published: (1998)

Low-Power CMOS Static Random Access Memory Design
by: Huang, Qi-Geng, et al.
Published: (1998)

Efficient power dissipation models for CMOS combinational logic gate and their applications
by: XIAO, ZHEN-ANG, et al.
Published: (1988)

Low-Voltag Low-Power Circuit and ARchitecture Designs for CMOS Receiver Front End
by: Kuang-Hu Huang, et al.
Published: (1999)

The Adiabatic Logic Circuit Technology Suitable for Low Voltage CMOS VLSI
by: HOU-FU CHEN, et al.
Published: (2004)

The Adiabatic Logic Circuit Technology Suitable for Low Voltage CMOS VLSI
by: HOU-FU CHEN, et al.
Published: (2004)

THE DESIGN AND ANALYSIS OF NEW CMOS DIFFERENTIAL LOGIC CLRCUITS FOR VLSI APPLICATIONS
by: Hong-Yi Huang, et al.
Published: (1994)

Design and Research of CMOS Power Amplifier for 5G Communications
by: Tsung-Ching Tsai, et al.
Published: (2018)

Design of Low Power Low Phase Noise CMOS VCO with Current Reused Topology
by: Tsung-han Han, et al.
Published: (2012)

A Refined Mixed-Level Power Estimation Approach For CMOS Logic Design
by: Chi-Chang Lu, et al.
Published: (2001)

Logic design testing
by: Kaposi, A. A.
Published: (1971)

STUDY AND IMPLEMENTATION OF CMOS MICROELECTROMECHANICAL FILTERS
by: Huang Tsung-Wei, et al.
Published: (2000)

Novel Non-Volatile Memory Cells for Advanced CMOS Logic Technologies
by: Huang, Chia-En, et al.
Published: (2010)

A Fully Integrated CMOS LC-VCO with Low Voltage and Low Power
by: 黃俊諺
Published: (2008)

Low-Power CMOS BandPass Filter for Application of Cochlear Prosthesis
by: Huang, Yu-Hua, et al.
Published: (2013)

Pseudo-DCVSL Architecture for Low-Power CMOS Digital Circuits Design
by: Chao-Wei Huang, et al.
Published: (2008)

The Design and Implementation of CMOS low noise amplifier and power amplifier
by: Fang Hsien Chu, et al.
Published: (2015)

Low-power CMOS multiplier complier
by: SHIN-JUNG LIN, et al.
Published: (2003)

Automatic Business Logic Test Generation for Pseudo Software
by: Jhang-Yan Huang, et al.
Published: (2015)

Test Case Generation Based on Constraint Logic Graph
by: Chiao-Yi Huang, et al.
Published: (2015)

A new two-phase pipelined dynamic cmos ternary logic
by: HUANG, HONG-YI, et al.
Published: (1989)

Low Voltage, Low Power CMOS OTA and COA
by: Cheng-ping Han, et al.
Published: (2004)

Cannot write session to /tmp/vufind_sessions/sess_f7nfbathuuvnkaapr5velamu43