| Summary: | 博士 === 國立臺灣大學 === 電機工程學研究所 === 89 === Low-power, high-throughput and small-area products with a short development schedule are general design aims in the 3C (computer, communication and consumption) era. The IAs ( Information Appliances) are the typical applications which expand the desktop information applications into everywhere as small as it can exist. It is recommended that hardward and
software design issues should be considered simultaneously, co-operatively and interactively. Especially for the multiple design objectives (e.g. low power, high throughput, small area, etc.), the MO ( Multicriteria Optimization) technique can be applied to make a trade-off decision.
FACE/FACE++ (Fine-tuned Architecture Codesign environment/Version 1 & 2) was developed to achieve these goals, including the organization of a design flow, a frequency-driven information analyzer, compiler techniques (code generator and instruction optimization) and a hierarchical object design library. This thesis explores the design space of a retargetable compiler and a fine-tuned hardware emulator, which combine both software and hardware reprogrammability. The environment, FACE, we have developed allows us to quickly move the functions between software and hardware in a state of flux.
It generates the ASIP (Application-Specific Integrated Processor) and a compiler for the new ASIP architecture. The experiment demonstrates the efficiency in ASIP design of FACE.
As for the applications in the new century, many information appliance products will replace traditional electronic appliances to help people in smart, efficient and low-cost ways. These successful products must be capable of communicating multimedia information, which is embedded into the
electronic appliances with high integration, innovation, and power-throughput tradeoff. We have developed a codesign procedure based on FACE, called FACE++, to analyze, compare and emulate the multimedia communication applications to find the candidate implementations under different criteria. The results show that in general, memory technology dominates the optimal
tradeoff and ALU improvements impact greatly on particular applications. This thesis combines lots of technologies into the design environment to evaluate the tradeoff among multiple objectives and solves the evaluation problem efficiently and effectively.
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