IEEE P1500 Test Wrapper Generator for Core-Based System-on-Chip
碩士 === 國立清華大學 === 電機工程學系 === 89 === In the System-on-Chip(SOC) designs, chips are composed of pre-designed cores for reducing time-to- market overhead. The complexity of test development is increased along with more cores inte-grated into a single chip. Moreover, cor...
| Main Authors: | , |
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| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/80311440843960264974 |