| Summary: | 碩士 === 國立清華大學 === 電子工程研究所 === 89 === In recent years, following the introducing of state of the art flat panel displays and communication products, demands for power devices have risen substantially. In keeping with the trend of circuit integration, traditional vertical device needs to be changed to lateral structure to make it possible for the integration of power devices and low voltage circuit on the same chip. The most commonly used lateral power devices are LDMOSFET and LIGBT.
Applying the principles of Reduced Surface Field (RESURF), integration of circuits can be realized by building power devices on a thin epi-layer. It is worth noting that device designs are complicated by the high sensitivity of device electrical characteristics to changes in process parameters. Problems with high on-resistance that are seen in traditional vertical structure DMOSFET still appear in LDMOSFET and phenomena of turn-off delay and latch-up are seen in LIGBT as well. Thus, designing a low power consumption, high breakdown, and high speed device is a significant topic for discussion.
At present, the most promising display, the Plasma Display Panel (PDP) employs a driver IC, which requires a voltage of around 200V. The subject for this thesis would thus be the design of a 200V power device. This study would center on simulations of the structures of LDMOSFET and LIBGT with tools like Tsuprem4 and Medici, analyses of turn-off and turn-on characteristics of the device, discussions on methods of overcoming defects in the device, and applications of certain workable techniques on BCD process to actually fabricate a device of an optimal design.
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