Study of High Speed Main Amplifier and Low Power Peripheral Circuitsfor Low Supply Voltage Dynamic Random Access Memory
碩士 === 國立中山大學 === 電機工程學系研究所 === 89 === Three high performance circuits for a low power supply DRAM’s are presented in this thesis. First, a modified multi-stage sense amplifier is proposed, that utilizes the auxiliary transmission gate and charge recycling technique. The auxiliary NMOS transistor...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
2001
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| Online Access: | http://ndltd.ncl.edu.tw/handle/71724474787536101488 |