Design and Simulation of SOI-AWG Devices

• Main Authors: Lin-Yu Ou, 歐燐育
• Other Authors: Yin-Chien Lai
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/44708282630739453555

碩士 === 國立交通大學 === 光電工程所 === 89 === In this paper we present our design and simulation results of array waveguide grating (AWG) devices based on the Silicon-On-Insulator (SOI) fabrication technology. Compared to other fabrication technologies like the Silica-on-Silcon technology, the SOI technology has the advantages of higher-functionality integration and lower fabrication cost. We have successfully designed SOI-based AWG devices with a flattened wavelength response by utilizing parabolic waveguide horns, Y-branch couplers, or Multi-Mode Interference (MMI) couplers which are placed at the entrance of the input slab waveguides. We obtain a 1dB bandwidth of 45 GHz and crosstalk < -50 dB. To reduce the channel non-uniformity we use different width tapers in each output waveguide. We have also simulated the impacts of the phase errors of array waveguides that are caused by the fabrication uncertainties. The impacts of the wafer surface roughness have also been taked into account in our simulation for completeness. Thes results should be helpful for the actual fabrication of the designed devices in the future.