Implementation of Adaptive Multi-alphabet Arithmetic Decoder
碩士 === 國立交通大學 === 電機與控制工程系 === 89 === Data compression played an important role in the data transmission and data storage. Arithmetic coding is an efficient loseless data compression technique and has been proposed in industrial standards. Traditionally, arithmetic coding applies certain...
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ndltd-TW-089NCTU05910472016-01-29T04:28:16Z http://ndltd.ncl.edu.tw/handle/60501285706085764930 Implementation of Adaptive Multi-alphabet Arithmetic Decoder 適應性多符號算術編碼之解碼器實現 Jen-Chun Peng 彭仁俊 碩士 國立交通大學 電機與控制工程系 89 Data compression played an important role in the data transmission and data storage. Arithmetic coding is an efficient loseless data compression technique and has been proposed in industrial standards. Traditionally, arithmetic coding applies certain specification for different types of data and results in average performance. To obtain the near-optimal performance, this thesis proposes a parameterized solution for adaptive arithmetic coding with a finite weighted history buffer. The thesis develops six probability models by tuning the size of history buffer and scaling weight. Our proposed decoder will employ one of the models for different files and allow users to set the selection of parameters. In addition to the parameterization, the thesis proposes a bit-wise binary searching algorithm to reduce the number of bit-compare operations. The reduction of operations can speed up our decoder significantly. As shown in the thesis, our decoder chip operates at 71.4 MHz clock rate and costs the area of 2.86*2.86 . Lan-Rong Dung 董蘭榮 2001 學位論文 ; thesis 69 zh-TW |
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碩士 === 國立交通大學 === 電機與控制工程系 === 89 === Data compression played an important role in the data transmission and data storage. Arithmetic coding is an efficient loseless data compression technique and has been proposed in industrial standards. Traditionally, arithmetic coding applies certain specification for different types of data and results in average performance. To obtain the near-optimal performance, this thesis proposes a parameterized solution for adaptive arithmetic coding with a finite weighted history buffer. The thesis develops six probability models by tuning the size of history buffer and scaling weight. Our proposed decoder will employ one of the models for different files and allow users to set the selection of parameters. In addition to the parameterization, the thesis proposes a bit-wise binary searching algorithm to reduce the number of bit-compare operations. The reduction of operations can speed up our decoder significantly. As shown in the thesis, our decoder chip operates at 71.4 MHz clock rate and costs the area of 2.86*2.86 .
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Lan-Rong Dung |
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Lan-Rong Dung Jen-Chun Peng 彭仁俊 |
author |
Jen-Chun Peng 彭仁俊 |
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Jen-Chun Peng 彭仁俊 Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
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Jen-Chun Peng |
title |
Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
title_short |
Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
title_full |
Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
title_fullStr |
Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
title_full_unstemmed |
Implementation of Adaptive Multi-alphabet Arithmetic Decoder |
title_sort |
implementation of adaptive multi-alphabet arithmetic decoder |
publishDate |
2001 |
url |
http://ndltd.ncl.edu.tw/handle/60501285706085764930 |
work_keys_str_mv |
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