Real-Time Implementation of G.723.1 Speech Codec on a 16-bit DSP Processor

• Main Authors: Sheng-Kai Chang, 張勝凱
• Other Authors: Jwu-Sheng Hu
• Format: Others
• Language: en_US
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/87207915641552526317

碩士 === 國立交通大學 === 電機與控制工程系 === 89 === This thesis presents a full-duplex, real-time implementation of ITU-T G.723.1 speech coder on a 16-bit fixed-point TI’s DSP chip, TMS320C5402. This thesis is divided into two parts. In the first part of the thesis, a brief introduction of G.723.1 speech encoder and decoder is presented. In the second part, the fixed-point operations and optimization methods are proposed in order to reduce the total cycle times consumed in real-time implementation. After the optimization, the total code size is 26.6k words and the computation complexities are 37 and 39 MIPS in the dual bit rates of 5.3k and 6.3kbps respectively, which are less than 40% of 100 MIPS DSP. In addition, a real-time demo using DSP/BIOS is also presented in this thesis.