| Summary: | 碩士 === 國立交通大學 === 電機與控制工程系 === 89 === This thesis presents the design and implementation of a DSP-based fully digital-controlled single-phase power-factor converter with fast dynamic response. The proposed control scheme can provide a fast dynamic response under large line and load variations at the same time maintains a unit power factor, lower current harmonic distortion, and high efficiency. The proposed fast PFC controller consists of an inner current-loop controller and an outer voltage-loop controller. The current-loop controller adopts predicted current control with an auxiliary feed-forward controller. The voltage-loop controller employs a double line frequency sampler to remove the line frequency ripples from the measured output voltage. By using the synchronized sampling scheme, the output voltage feedback contains no ripple components and we can improve the voltage loop bandwidth compared with the conventional approaches. The control algorithm, which is simple and fast, provides a significant improvement in system dynamic responses compared to conventional analog control techniques. The proposed control scheme has been verified by using computer simulation with PSIM and implemented using a single-chip DSP (TMS320F240) from Texas Instruments. Experimental verification has been carried out on a 2 kVA PFC converter using DSP controller. Experimental results show the feasibility and superiority of the proposed digital fast response PFC control scheme.
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