An all digital multiuser CDMA receiver and its ASIC design

碩士 === 國立交通大學 === 電信工程系 === 89 === In recent years, a class of DS-CDMA schemes has been proposed as a major candidate for the next generation digital cellular system. It is known that the capacity of a CDMA system is interference limited. This problem can be alleviat...

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Main Authors: Chien-Chung Chio, 邱健忠
Other Authors: Wen-Rong Wu
Format: Others
Language:zh-TW
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/77055168245913359247
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spelling ndltd-TW-089NCTU04350432016-01-29T04:28:15Z http://ndltd.ncl.edu.tw/handle/77055168245913359247 An all digital multiuser CDMA receiver and its ASIC design 全數位化多使用者之分碼多工接收機及其ASIC設計 Chien-Chung Chio 邱健忠 碩士 國立交通大學 電信工程系 89 In recent years, a class of DS-CDMA schemes has been proposed as a major candidate for the next generation digital cellular system. It is known that the capacity of a CDMA system is interference limited. This problem can be alleviated by the so called multiuser detection (MUD). In this thesis, we propose an all digital CDMA receiver for MUD. We use a two-stage partial parallel interference cancellation (PIC) algorithm for MUD as well as for code tracking. It is shown that the detection and code tracking performance can be greatly enhanced using the proposed structure. Finally, the receiver is implemented using the VHDL with a fixed-point architecture. Wen-Rong Wu 吳文榕 2001 學位論文 ; thesis 59 zh-TW
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description 碩士 === 國立交通大學 === 電信工程系 === 89 === In recent years, a class of DS-CDMA schemes has been proposed as a major candidate for the next generation digital cellular system. It is known that the capacity of a CDMA system is interference limited. This problem can be alleviated by the so called multiuser detection (MUD). In this thesis, we propose an all digital CDMA receiver for MUD. We use a two-stage partial parallel interference cancellation (PIC) algorithm for MUD as well as for code tracking. It is shown that the detection and code tracking performance can be greatly enhanced using the proposed structure. Finally, the receiver is implemented using the VHDL with a fixed-point architecture.
author2 Wen-Rong Wu
author_facet Wen-Rong Wu
Chien-Chung Chio
邱健忠
author Chien-Chung Chio
邱健忠
spellingShingle Chien-Chung Chio
邱健忠
An all digital multiuser CDMA receiver and its ASIC design
author_sort Chien-Chung Chio
title An all digital multiuser CDMA receiver and its ASIC design
title_short An all digital multiuser CDMA receiver and its ASIC design
title_full An all digital multiuser CDMA receiver and its ASIC design
title_fullStr An all digital multiuser CDMA receiver and its ASIC design
title_full_unstemmed An all digital multiuser CDMA receiver and its ASIC design
title_sort all digital multiuser cdma receiver and its asic design
publishDate 2001
url http://ndltd.ncl.edu.tw/handle/77055168245913359247
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