FPGA Realization and Experimental Study of W-CDMA RAKE Receiver

• Main Authors: Zhi-Yuan Chen, 陳智源
• Other Authors: Ta-Sung Lee
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/25979082651699225808

碩士 === 國立交通大學 === 電信工程系 === 89 === To realize the third-generation mobile communication systems, known as International Mobile Telecommunications-2000 (IMT-2000), the wideband CDMA (W-CDMA) schemes incorporating as many recent technology developments as possible is necessary. On the other hand, FPGA (Field Programmable Gate Array) is a programmable combinational logic IC. The user can design any logic circuit and verify the design on the FPGA IC directly. In this thesis, we investigate the feasibility of digital design of a W-CDMA baseband receiver. In particular, a digital circuit is used to realize the receiver. The circuit includes RAKE receiver, channel estimation, transmit power control and automatic frequency control, etc. The receiver consists of a searcher with three-finger combiner, and each finger can perform demodulation for three dedicated physical channels simultaneously. It can also provide effective estimation of frequency offsets. Finally, we propose a new digital method to solve the clock recovery problem in the proposed circuit. The circuit in the thesis is described by VHDL language and targeted for Xilinx FPGA implementation.