Study of Small Dimension Polycrystlline Silicon Thin Film Transistors

碩士 === 國立交通大學 === 電子工程系 === 89 === In this thesis, small dimension poly-Si TFTs with different dimensions, poly-Si film thickness, and grain size are fabricated and characterized successfully. In addition, the multichannel devices were chosen to investigate the influence of channel sidewa...

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Main Authors: Yi-Chang Chen, 陳奕璋
Other Authors: Chun-Yen Chang
Format: Others
Language:en_US
Published: 2001
Online Access:http://ndltd.ncl.edu.tw/handle/85196214621683370180
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spelling ndltd-TW-089NCTU04281332016-01-29T04:28:14Z http://ndltd.ncl.edu.tw/handle/85196214621683370180 Study of Small Dimension Polycrystlline Silicon Thin Film Transistors 小尺寸薄膜電晶體之研究 Yi-Chang Chen 陳奕璋 碩士 國立交通大學 電子工程系 89 In this thesis, small dimension poly-Si TFTs with different dimensions, poly-Si film thickness, and grain size are fabricated and characterized successfully. In addition, the multichannel devices were chosen to investigate the influence of channel sidewall and trap density on device performance. Finally, the mechanism of dimensional-related electrical behavior was proposed properly to explain our experimental result. Our devices are divided into three groups. (1) Narrow width devices are devices with various channel widths and fixed channel length. (2) Short channel devices are devices with various channel lengths and fixed channel width. (3) Multichannel devices are devices with various number of channel finger and fixed channel width, and devices with various finger widths and fixed number of channel finger. All the devices exhibit typical electrical characteristics, the result shows that device performance is improved as the width decreases. This is resulted from the reduction of trap density. The behaviors of multichannel devices also support this inference. Multichannel devices can improve performance only when their finger widths are quite small. Thinner channel thickness, larger gate voltage, and larger grain size can enhance this improvement. Severe threshold voltage roll-off and obvious kink effect under high drain voltage is due to the impact ionization at drain side. However, in our experiment, serious threshold voltage roll-off was observed even under low drain voltage. The body potential was also raised dramatically in this low drain voltage region. According to poor gate voltage controllability at body side and the narrow depletion regions on poly-Si grain boundaries, we proposed a plausible grain-boundary impact ionization mechanism to explain the result of this experiment. Chun-Yen Chang 張俊彥 2001 學位論文 ; thesis 81 en_US
collection NDLTD
language en_US
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sources NDLTD
description 碩士 === 國立交通大學 === 電子工程系 === 89 === In this thesis, small dimension poly-Si TFTs with different dimensions, poly-Si film thickness, and grain size are fabricated and characterized successfully. In addition, the multichannel devices were chosen to investigate the influence of channel sidewall and trap density on device performance. Finally, the mechanism of dimensional-related electrical behavior was proposed properly to explain our experimental result. Our devices are divided into three groups. (1) Narrow width devices are devices with various channel widths and fixed channel length. (2) Short channel devices are devices with various channel lengths and fixed channel width. (3) Multichannel devices are devices with various number of channel finger and fixed channel width, and devices with various finger widths and fixed number of channel finger. All the devices exhibit typical electrical characteristics, the result shows that device performance is improved as the width decreases. This is resulted from the reduction of trap density. The behaviors of multichannel devices also support this inference. Multichannel devices can improve performance only when their finger widths are quite small. Thinner channel thickness, larger gate voltage, and larger grain size can enhance this improvement. Severe threshold voltage roll-off and obvious kink effect under high drain voltage is due to the impact ionization at drain side. However, in our experiment, serious threshold voltage roll-off was observed even under low drain voltage. The body potential was also raised dramatically in this low drain voltage region. According to poor gate voltage controllability at body side and the narrow depletion regions on poly-Si grain boundaries, we proposed a plausible grain-boundary impact ionization mechanism to explain the result of this experiment.
author2 Chun-Yen Chang
author_facet Chun-Yen Chang
Yi-Chang Chen
陳奕璋
author Yi-Chang Chen
陳奕璋
spellingShingle Yi-Chang Chen
陳奕璋
Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
author_sort Yi-Chang Chen
title Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
title_short Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
title_full Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
title_fullStr Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
title_full_unstemmed Study of Small Dimension Polycrystlline Silicon Thin Film Transistors
title_sort study of small dimension polycrystlline silicon thin film transistors
publishDate 2001
url http://ndltd.ncl.edu.tw/handle/85196214621683370180
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