| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 89 === In this thesis, we propose a novel vertical structure concept, which the channel length is controlled by thickness of polysilicon films instead of the photolithographic limitation. Hence, the investigation of thin gate oxide quality on vertical structure is very important. In our study, we form the oxide on the vertical structure by thermal oxidation and PECVD TEOS deposition and investigate the effect of sacrificial oxidation process on the electrical properties of the vertical polyoxide. Besides, we studied the differences between different oxide formation methods, and found a best solution to form an excellent vertical oxide. We find that sacrificial process can remove the RIE-induced damages and impurities on the vertical polysilicon surface. Although sacrificial oxidation causes the enhanced surface roughness for thermal oxides, we can obtain high oxide charge to breakdown by pre-sacrificial process. Moreover, for PE-TEOS oxides with pre-sacrificial treatment, they have symmetric and better electrical characteristics than thermal oxides.
As a result, the PECVD TEOS vertical polyoxide with pre-sacrificial process have good performance that can compare with traditional planar polyoxides. This oxide is suitable to be applied in future ULSI devices fabrication.
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