LNA/Mixer and Frequency Synthesizer VCO/Prescaler CMOS RFICs and FPGA Circuit Design For 2.4GHz Wireless Communications

• Main Authors: Wen-Hsiang Kiang, 江文賢
• Other Authors: Huey-Ru Chuang
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/89524007423226504473

碩士 === 國立成功大學 === 電機工程學系 === 89 === This thesis presents the design and implementation of 2.4GHz ISM-band downconverter RFICs, including LNA/mixer and frequency synthesizer VCO/ prescaler, in a standard 0.35mm CMOS technology. Also, the counters of a 2.4GHz PLL frequency synthesizer based on DSP-architecture are realized by FPGA devices. The LNA uses the common source cascode circuit and the mixer is the single-ended type. The VCO adopts the LC-tank type, and the prescaler uses asynchronous divide-by N circuit. Simulation results show that the LNA has 2.72dB noise figure and 14.8dB gain, the mixer has 12dB noise figure and 10.2dB conversion loss. The VCO is from 1.98GHz to 2.23GHz and phase noise is -99dBc/Hz @100KHz. FPGA devices are used to reduce the size of the counters of the PLL frequency synthesizer. Further effort will be devoted to design and implement a complete 2.4 GHz CMOS downconverter RFIC.