Design of a CMOS Frequency Synthesizer

• Main Authors: Thin-Li Wu, 吳心立
• Other Authors: HongChin Lin
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/93593446548164011663

碩士 === 國立中興大學 === 電機工程學系 === 89 === Conventional RF frequency synthesizer circuits were fabricated using GaAs, bipolar, or even BiCMOS technology on the base of larger driving ability and better RF characteristics. However, These two processes are not compatible to the typical CMOS process, which is used to implement the baseband circuits. In order to meet the potentially high demand for such wireless LAN products, low-cost silicon-based radio transceivers are preferred because of the capability of integration. Thus, if the CMOS RF circuits can be realized, the whole transceiver circuits can be integrated into a single chip, and the cost will be cut down significantly. With the channel length of CMOS transistor scaling down year by year, CMOS RF-ICs are practical today, but there are still a lot of difficulties unsolved. The goal toward one chip system is a major challenge. This thesis describes a 3.3V 2.4GHz CMOS frequency synthesizer, which is composed of a phase/frequency detector (PFD), a charge-pump (CP), a low-pass filter (LF), a voltage-controlled oscillator (VCO) and a multi-modulus frequency divider (FD). In this thesis, we focus on the novel and simpler multi-modulus frequency divider and phase frequency detector (PFD) for 2.4GHz frequency synthesizers. The chip has been implemented using TSMC 1P4M technology