| Summary: | 碩士 === 逢甲大學 === 電子工程學系 === 89 === The purpose of this thesis is to study and implement the RF front-end circuits for digital mobile communication system. The RF module is operated in the mode of frequency division duplex (FDD), and it’s circuits structure is heterodyne structure. The operation frequency of this module is design to meet the basic requirement of 3G frequency band which the up-link frequency is 1920-1980 MHz, the down-link frequency is 2110-2170 MHz, the local frequency is 2330 MHz. Therefore, the Intermediate Frequency (IF) of transmitter and receiver are 380 MHz and 210 MHz respectively.
The up-link circuits of front-end consist of up-mixer and pre-amplifier. The aim of up-mixer is to convert the IF from 380 MHz to 1950 MHz. In this thesis, we used the RFMD’s RF3868 to implement the up-mixer. The aim of pre-amplifier is to enlarge the signal power, which can drive the power amplifier. The pre-amplifier is a high linearity amplifier, which is design by BFR505 and BFP420.
The down-link circuits consist of Low Noise Amplifier (LNA) and down-convert mixer. LNA is to enlarge the received Radio Frequency (RF) signal and suppress noise. Down-convert mixer is to convert 2120 MHz RF signal to 210 MHz Intermediate Frequency (IF) signal. We used RFMD’s RF9986 to implement the down-link circuits in this thesis.
We follow the specification of 3GPP TS25.101 to evaluate circuit performances after finished the front-end circuits. For this reason we used signal generator E4432B to generate 3.84 Msps of symbol rate, α= 0.22 Root Nyquist filter shaping QPSK testing signal, measured and analysis by vector signal analyzer. All circuits of front-end is operated in the voltage of 3 V, the current consumption about 100 mA.
In the up-link circuits, up-mixer’s conversion gain is about-2 ~ -3 dB, IP3 is 5.4 dBm, input/output return lose are less than -20dB and Error Vector Magnitude (EVM) is less than 1.81 %; the gain of pre-amplifier is about 37 ~ 38 dB, 1 dB compression point about -24 dBm, IP3 is 24.17 dBm and EVM is less than 1.81 %. The total performance of up-link circuits are: total gain is about 34 ~ 35 dB, 1 dB compression point is about -24 dBm, EVM is less than 2.57 % and Adjacent Channel Power Ratio (ACPR) is -38 dBc @ offset 5 MHz, -43 dBc @ offset 10 MHz.
The performance of down-link circuits are: conversion gain is about 17 ~ 18 dB, Noise Figure (NF) is 5.6 dB, IP3 is -9.7 dBm, input/output return lose are less than -10 dB and EVM is less than 2.3 %.
With the measured results mentioned as above, knowing that the up/down-link circuits that have been implemented can meet the requirements of 3rd Generation Partnership Project (3GPP).
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