The study of multiple test for optimum test yield, test quality and tester accuracy
碩士 === 中華大學 === 電機工程學系碩士班 === 89 === This thesis introduces how a test system works. It contains the derivation of relationships of test yield and test quality for the varied specification requirement including single-test, two-test, repeat-test and multiple-test. By the results, it is sh...
Main Author: | 陳育興 |
---|---|
Other Authors: | 陳竹一 |
Format: | Others |
Language: | zh-TW |
Published: |
2001
|
Online Access: | http://ndltd.ncl.edu.tw/handle/85198657545416650019 |
Similar Items
-
Multiple Tests to the Improvement of Yield and Quality
by: Chung-Huang Yeh, et al.
Published: (2002) -
Single Chip Memory Tester for Burn-in test
by: Li, Kwang Wang, et al.
Published: (1998) -
Optimum plot size and shape for safflower yield tests
by: Draper, Arlen D., 1930-
Published: (1959) -
A Study of Tester Scheduling for Logic IC Final Testing
by: Wai-Ting Li, et al.
Published: (2000) -
Innovation of hardness tester mechanism and its functionality test
by: Bárnik František, et al.
Published: (2018-01-01)