Pipelined Recursive Least-Square Algorithm Using Relaxed Givens Rotations

• Main Authors: Chang,Chi-Hong, 張志宏
• Other Authors: 馮武雄
• Format: Others
• Language: zh-TW
• Published: 2001
• Online Access: http://ndltd.ncl.edu.tw/handle/81009897313475718531

碩士 === 長庚大學 === 電機工程研究所 === 89 === This paper proposed a RGR-RLS (Relaxed Givens Rotations Recursive Least-Square) VLSI architecture which is implemented by RLS algorithm. The RGR-RLS is based on QRD-RLS (QR-Decomposition-RLS) algorithm to improve complex computation due to Givens Rotations. The key point is that complex computation can be approximated by a simple mathematic equation, and it creates a new PRGR-RLS (Pipelined RGR-RLS) algorithm. Thus, the PRGR-RLS has pipeline, no matrix-inverse operation and square-root free. So it is suitable for VLSI implementation. The software simulation uses an adaptive equalizer as a system model, and adaptive algorithm operates a five-level pipelined RGR-RLS algorithm. The simulation results show that convergence speed and mean square error (MSE) are close to QRD-RLS algorithm. The proposed algorithm is compared with other similar algorithms, and the performances are not worse than them. So PRGR-RLS will be an alternative VLSI architecture to implement RLS algorithm.