Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor

碩士 === 國立臺灣大學 === 電信工程學研究所 === 88 ===

Bibliographic Details
Main Authors: Chuen-Young Shieh, 謝春勇
Other Authors: Mao-Chao Lin
Format: Others
Language:zh-TW
Published: 2000
Online Access:http://ndltd.ncl.edu.tw/handle/52182056147783522309
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spelling ndltd-TW-088NTU004350412016-01-29T04:18:38Z http://ndltd.ncl.edu.tw/handle/52182056147783522309 Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor 具迴旋處理器之籬柵碼的次佳化解碼器 Chuen-Young Shieh 謝春勇 碩士 國立臺灣大學 電信工程學研究所 88 Mao-Chao Lin 林茂昭 2000 學位論文 ; thesis 70 zh-TW
collection NDLTD
language zh-TW
format Others
sources NDLTD
description 碩士 === 國立臺灣大學 === 電信工程學研究所 === 88 ===
author2 Mao-Chao Lin
author_facet Mao-Chao Lin
Chuen-Young Shieh
謝春勇
author Chuen-Young Shieh
謝春勇
spellingShingle Chuen-Young Shieh
謝春勇
Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
author_sort Chuen-Young Shieh
title Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
title_short Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
title_full Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
title_fullStr Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
title_full_unstemmed Circuit Design of Suboptimal Decoders for Trellis Codes with a Convolutional Processor
title_sort circuit design of suboptimal decoders for trellis codes with a convolutional processor
publishDate 2000
url http://ndltd.ncl.edu.tw/handle/52182056147783522309
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