A Multiple Page Programming Scheme in NAND Type Flash Memory
碩士 === 國立清華大學 === 電子工程研究所 === 88 === A fast programming scheme for NAND type architecture utilized cell storage and multiple wordline programming is dedicated in this study. In the prior arts, only multiple page programming is adopted to increase the program throughput. To obtain higher throughput,...
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| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/12277428799668268460 |
| Summary: | 碩士 === 國立清華大學 === 電子工程研究所 === 88 === A fast programming scheme for NAND type architecture utilized cell storage and multiple wordline programming is dedicated in this study. In the prior arts, only multiple page programming is adopted to increase the program throughput. To obtain higher throughput, the large amount of data are stored in the even or odd cells and programmed simultaneously. Experimental results demonstrate the reliable storage characteristics and endurance characteristics (more than 1E6 cycles). Besides, the programming ability is enormously improved with the scaled device. Therefore, the proposed In Cell Temporary Storage (ICTS) and Multiple Wordline Page Programming (MWPP) is a promising candidate for high speed and high reliability applications.
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