Summary: | 碩士 === 國立清華大學 === 資訊工程學系 === 88 === In this thesis, we will study the construction of
a Steiner routing tree for a given net with the
objective of minimizing the delay of the routing tree.
Previous researches adopt Elmore delay model
to compute delay.
We also adopt the motivations to design the flow.
However, with the advancement of IC technology, a more accurate delay
model is required. Therefore, in this thesis,
we will use two-pole delay model to compute the cost function
of a Steiner tree.
Moreover, we propose a new algorithm to construct the Steiner tree.
Our algorithm takes into consideration the net topology, the total wire
length and the longest path from the source to sink.
Experimental results show that our algorithm is very
effective and efficient as compared to [8].
|