VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode
碩士 === 國立東華大學 === 資訊工程學系 === 88 ===
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ndltd-TW-088NDHU03920152016-07-08T04:22:54Z http://ndltd.ncl.edu.tw/handle/08633048765352405341 VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode 具運作模式Blowfish區塊加密器之VLSI實作與智產元件設計 許育彰 碩士 國立東華大學 資訊工程學系 88 賴永康 2000 學位論文 ; thesis 75 en_US |
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en_US |
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Others
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碩士 === 國立東華大學 === 資訊工程學系 === 88 ===
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author2 |
賴永康 |
author_facet |
賴永康 許育彰 |
author |
許育彰 |
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許育彰 VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
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許育彰 |
title |
VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
title_short |
VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
title_full |
VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
title_fullStr |
VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
title_full_unstemmed |
VLSI Implementation and IP Design for Blowfish Block Cipher with Operation Mode |
title_sort |
vlsi implementation and ip design for blowfish block cipher with operation mode |
publishDate |
2000 |
url |
http://ndltd.ncl.edu.tw/handle/08633048765352405341 |
work_keys_str_mv |
AT xǔyùzhāng vlsiimplementationandipdesignforblowfishblockcipherwithoperationmode AT xǔyùzhāng jùyùnzuòmóshìblowfishqūkuàijiāmìqìzhīvlsishízuòyǔzhìchǎnyuánjiànshèjì |
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