A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus
碩士 === 國立中央大學 === 電機工程研究所 === 88 === This paper is about a design for diagnosis (DFD) technique for the on-chip bus wires. It uses digital method to measure the delay and crosstalk for the testing and diagnosis of on-chip bus wires. For the delay measurement, the digital delay measureme...
Main Authors: | , |
---|---|
Other Authors: | |
Format: | Others |
Language: | en_US |
Published: |
2000
|
Online Access: | http://ndltd.ncl.edu.tw/handle/65452452929684693628 |
id |
ndltd-TW-088NCU00442023 |
---|---|
record_format |
oai_dc |
spelling |
ndltd-TW-088NCU004420232016-07-08T04:22:42Z http://ndltd.ncl.edu.tw/handle/65452452929684693628 A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus 匯流排上的時間延遲及交談失真的偵錯設計技巧 Gan-Nan Chen 陳耿男 碩士 國立中央大學 電機工程研究所 88 This paper is about a design for diagnosis (DFD) technique for the on-chip bus wires. It uses digital method to measure the delay and crosstalk for the testing and diagnosis of on-chip bus wires. For the delay measurement, the digital delay measurement module (DMM) counts the duty cy-cle of the phase detector (PD) output, which is the exclusive-or of the test signal and the delayed sig-nal, to determine the delay. The diagnosis con-figuration can use to identity whether the drivers, receivers, or wires are in fault. The crosstalk noise measurement can be used to analysis the phenomenon. Finally, a full custom chip design is implemented to verify and simulate the above functions. ChauChin Su 蘇朝琴 2000 學位論文 ; thesis 67 en_US |
collection |
NDLTD |
language |
en_US |
format |
Others
|
sources |
NDLTD |
description |
碩士 === 國立中央大學 === 電機工程研究所 === 88 === This paper is about a design for diagnosis (DFD) technique for the on-chip bus wires. It uses digital method to measure the delay and crosstalk for the testing and diagnosis of on-chip bus wires. For the delay measurement, the digital delay measurement module (DMM) counts the duty cy-cle of the phase detector (PD) output, which is the exclusive-or of the test signal and the delayed sig-nal, to determine the delay. The diagnosis con-figuration can use to identity whether the drivers, receivers, or wires are in fault. The crosstalk noise measurement can be used to analysis the phenomenon. Finally, a full custom chip design is implemented to verify and simulate the above functions.
|
author2 |
ChauChin Su |
author_facet |
ChauChin Su Gan-Nan Chen 陳耿男 |
author |
Gan-Nan Chen 陳耿男 |
spellingShingle |
Gan-Nan Chen 陳耿男 A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
author_sort |
Gan-Nan Chen |
title |
A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
title_short |
A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
title_full |
A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
title_fullStr |
A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
title_full_unstemmed |
A Design for Diagnosis technique for the Delay and Crosstalk Measurement of On-chip Bus |
title_sort |
design for diagnosis technique for the delay and crosstalk measurement of on-chip bus |
publishDate |
2000 |
url |
http://ndltd.ncl.edu.tw/handle/65452452929684693628 |
work_keys_str_mv |
AT gannanchen adesignfordiagnosistechniqueforthedelayandcrosstalkmeasurementofonchipbus AT chéngěngnán adesignfordiagnosistechniqueforthedelayandcrosstalkmeasurementofonchipbus AT gannanchen huìliúpáishàngdeshíjiānyánchíjíjiāotánshīzhēndezhēncuòshèjìjìqiǎo AT chéngěngnán huìliúpáishàngdeshíjiānyánchíjíjiāotánshīzhēndezhēncuòshèjìjìqiǎo AT gannanchen designfordiagnosistechniqueforthedelayandcrosstalkmeasurementofonchipbus AT chéngěngnán designfordiagnosistechniqueforthedelayandcrosstalkmeasurementofonchipbus |
_version_ |
1718340022275407872 |