| Summary: | 碩士 === 國立交通大學 === 電信工程系 === 88 === Recently, the use of software-defined radio (SDR) technology to implement the third-generation mobile communication systems, based on wideband code division multiple access (W-CDMA), has become a topic of great interest. In this thesis, the concept of layered architecture, which is the platform for the SDR, is first introduced. The properties of two major function units of SDR, i.e., FPGA''s and DSP''s, are then discussed. Third, the space-time RAKE (S-T RAKE) receiver and space-time multistage parallel interference canceller (S-T MPIC) for W-CDMA systems are developed, simulated and realized on a DSP applications board (TMS320C6201 based). From the results, we demonstrate that the S-T RAKE receiver equipped with S-T MPIC performs reliably in the presence of strong multiple access interference (MAI). In addition, code acquisition is incorporated to obtain the initial timing for the receiver. With the antenna array employed, an S-T code acquisition scheme results that can effectively combat strong traffic interference during the acquisition period of the signal. The proposed receiver, including S-T code acquisition, S-T RAKE receiver and S-T MPIC, is realized on the DSP board, and simulated data are used to confirm the effectiveness of the realization.
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