Tungsten Probe Measuring System of Unpackaged Integration Circuit Chip and Related Process Technology
碩士 === 國立交通大學 === 電子工程系 === 88 === As the electronic application products are tending to the more and more small, modern wafer level packaging has to be developed. This technology cost much more than those of the traditional packaging methods. For saving the packaging cost, waf...
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| Format: | Others |
| Language: | en_US |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/90636231151027650355 |
| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 88 === As the electronic application products are tending to the more and more small, modern wafer level packaging has to be developed. This technology cost much more than those of the traditional packaging methods.
For saving the packaging cost, wafer level testing is the next generation main issue. Knowing which die is good becomes important before packaging. Many people have mentioned several kinds devices to testing.
Here we give a new device structure to testing in the die size. Related process and fabrication technology have studied detail. And some others testing devices presented are shown at last.
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