| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 88 === With the advancement of the digital signal processing, real-time video transmis-
sion will become an essential element in our daily life. In this thesis, we implement a
real-time H.263+ codec by using a digital signal processor (DSP). In order to achieve
this goal, we need to replace a few slow blocks in the original C programs. Further-
more, the C programs are modied to take advantages of the DSP architecture and
its C compiler features.
We rst give a brief introduction to the ITU-T video compression standard,
H.263+. It produces reasonable quality videophone pictures at bit rates around
40kbps. Then, we brie y describe the Texas Instruments digital signal processor,
TMS320C62xx, which is used in our implementation. It is a powerful processor with
xed-point arithmetic. We start with the simulation software tmn 2.0 provided by
Telenor Research as the initial template and then modify it to increase its speed. We
use the diamond search, which is included in tmn 3.1.1 (a software encoder oered by
University of British Columbia), to replace the original full search scheme. We use
a xed-point Decimation-In-Frequency DCT algorithm to replace the oating-point
DCT block in tmn 2.0. These two fast algorithms greatly reduce the computation
complexity of the entire system. We further rene our codes by taking into account
the features of the TMS320C62xx and its C compiler to produce a more ecient
program. Overall, we save 95% of the computation load for intra frame coding and
97% for inter frame coding. Our encoder can handle 69 intra frames or 31 inter
frames per second for sub-QCIF pictures. The entire system can thus process about
24 frames per second using only one TI processor for both encoding and decoding.
|
|---|
