Architectures and CAD for Dynamically Reconfigurable Field-Programmable Gate Arrays

博士 === 國立交通大學 === 資訊科學系 === 88 === Improving logic efficiency by time-sharing, Dynamically Reconfigurable FPGAs (DRFPGAs) have attracted much attention recently. In a DRFPGA, a virtual large design is partitioned into multiple stages (or partitions) to share the same smaller physical device than tha...

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Bibliographic Details
Main Authors: Guang-Ming Wu, 吳光閔
Other Authors: Yao-Wen Chang
Format: Others
Language:en_US
Published: 2000
Online Access:http://ndltd.ncl.edu.tw/handle/51836091379064272536