Characterization and fabrication of LPD-oxide GaAs MOSFET

• Main Authors: Zhen-Song Ya, 葉振松
• Other Authors: Mau-Phon Houng
• Format: Others
• Language: en_US
• Published: 2000
• Online Access: http://ndltd.ncl.edu.tw/handle/89067235860254821641

碩士 === 國立成功大學 === 電機工程學系 === 88 === The volatilization of group V compounds is very serious at high temperatures. Therefore, we provide a low-temperature liquid phase deposition SiO2 (LPD-SiO2) method in this article. It can deposit thin silicon dioxide (~4nm) on GaAs substrate by optimizing control of the growth condition and have advantage of low temperature process lower than 60℃. The maximum temperature of fabrication MOSFET process is 400℃ in N2 for 33 minutes . We found that after annealing at this condition not only the quality of oxide can be improved but also obtains low ohmic contact resistance at the same time with corresponding to a specific contact resistance approximately 8.8 ×10-7Ω-cm2. This makes the fewer and simpler fabrication processes. The advantages of the large band gap and high electron mobility of GaAs have long been recognized and many efforts to fabricate MOSFET have been pursued. The fabricated GaAs MOSFET with LPD-SiO2 as gate insulator exhibit current-voltage curves with complete pinch-off and saturation characteristic and exhibiting a normalize transconductance in the vicinity of 280 mS/mm was obtained at room temperature for the 8μm gate length MOSFET. The unity current-gain cutoff frequency (ft) and the maximum frequency of oscillation (fmax)were measured to be 1.1 and 3.4 GHz for the channel length and width are 10 and 40μm, respectively. Finally, theoretical simulation of the MOSFET I-V characteristic is also introduced to compare with the practical experiments.