The Improvement of Cell Performance and Reliability of Split-Gate Flash Memory by Novel Processing Technologies and Operation Techniques
博士 === 國立成功大學 === 電機工程學系 === 88 === Combining the outstanding programming efficiency of split-gate structure with the economic advantages of “Flash” erase design, the split-gate Flash memory cell hold the promise to realize the high performance and high reliability Flash EEPROM. In this dissertation...
Main Authors: | Kuo-Ching Huang, 黃國欽 |
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Other Authors: | Yean-Kuen Fang |
Format: | Others |
Language: | zh-TW |
Published: |
1999
|
Online Access: | http://ndltd.ncl.edu.tw/handle/53724004695044015560 |
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