Wire Length and Domino Power Minimization Based on Multiple Wire Replacement Techniques
碩士 === 國立中正大學 === 資訊工程研究所 === 88 === Dynamic logics such as domino logic can be a substitute on higher performance circuit design for static CMOS logic. Usually, such substitution can lead to delay and area reduction. Our objective in this thesis attempts to reduce the power consumption of domino ci...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
2000
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| Online Access: | http://ndltd.ncl.edu.tw/handle/44616357882225893383 |