Wire Length and Domino Power Minimization Based on Multiple Wire Replacement Techniques

• Main Authors: Sheng-Hung Tu, 涂昇宏
• Other Authors: Shih-Chieh Chang
• Format: Others
• Language: zh-TW
• Published: 2000
• Online Access: http://ndltd.ncl.edu.tw/handle/44616357882225893383

碩士 === 國立中正大學 === 資訊工程研究所 === 88 === Dynamic logics such as domino logic can be a substitute on higher performance circuit design for static CMOS logic. Usually, such substitution can lead to delay and area reduction. Our objective in this thesis attempts to reduce the power consumption of domino circuits. In order to achieve this goal, we introduced a logic synthesis tool, called the alternative node technique, which can perform multiple wire replacement at the same time. By observing the monotone property of domino logic, we can achieve the goal of power reduction by extending the alternative node technique to reduce the total switching probability in a domino circuit. In addition, we also have proposed an effective framework which combines the logic and layout synthesis algorithms to further improve the wire (interconnection) length. The results show that the flexibility of the Alnode technique can be successfully extended to power reduction and wire length minimization with little run time.