Design and Implementation of Gaussian MSK Receiver for Wireless Communication System
碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === Recently, Gaussian Minimum Shift Keying (GMSK) has received much attention for application in wireless communication system. In this thesis, the design and implementation of the integrated circuits for GMSK receiver is described. The research goal is...
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| Format: | Others |
| Language: | en_US |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/51153932641236352367 |
| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === Recently, Gaussian Minimum Shift Keying (GMSK) has received much attention for application in wireless communication system. In this thesis, the design and implementation of the integrated circuits for GMSK receiver is described. The research goal is to make an all-digital receiver to the field of communications by finding better ways to demodulate GMSK in the mobile radio communication environment.
This thesis proposes a modified architecture for GMSK receiver and has more advantages than the conventional receiver. Functional optimization and architecture design was performed before layout implementation. The receiver prove to work at 5V supply voltage. In addition, we simulate the performances of different receivers for a given BT (bandwidth-time product) according to our receiver specification. The bit rate of this GMSK receiver is designed to 270.833 Kbps for GSM mobile specification. The product of 3dB bandwidth of filter and the bit rate is 0.5. Besides, physical design is described and verified by the Verilog hardware description language. The final layout of the proposed architecture through TSMC 0.6 m SPDM CMOS technology is presented.
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