| Summary: | 碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === In this thesis, the design and implementation of analog front end for digital cable modem are introduced. A quantizer is utilized in the automatic gain control (AGC) to regulate its loop bandwidth, which can accomplish fast acquisition and low gain fluctuation simultaneously. Meanwhile, to achieve robustness against various variations and good programmability, mixed mode circuit architecture is adopted. Except for the inevitable analog circuits such as variable gain amplifier (VGA), receive bandpass filter (Rx BPF) and gain/buffer (G/B), the rest parts are realized in digital form. Careful design optimization and parameter assignment are performed before layout. Implemented in 0.6um N-well single poly triple metal (SPTM) digital CMOS technology, the analog front end provides 25dB dynamic range, 240Hz acquisition loop bandwidth and 3.8KHz steady-state loop bandwidth for both 64QAM and 8VSB signals. The passband ripple from 1.2MHz to 7MHz is less than 1dB, and the out-of-band attenuation at 600KHz and 7MHz are 19dB and 36dB, respectively. The analog forward path consumes 70mW under 3.3V supply voltage while the digital feedback path draws 24mW from 5V supply voltage.
|
|---|
