The Design and Realization of a Sequencer Architecture in Automatic Test Equipment

• Main Authors: Ting-Yuang, Wang, 王廷元
• Other Authors: 曹恆偉
• Format: Others
• Language: zh-TW
• Published: 1999
• Online Access: http://ndltd.ncl.edu.tw/handle/94048759321228870179

碩士 === 國立臺灣大學 === 電機工程學研究所 === 87 === Abstract The thesis introduces the design and circuit realization of Sequencer Architecture in the Auto　Test　Equipment. Considering of the high-speed, multi-function, and real-time measurement, we adopted the architecture, including three-stage-pipeline, and parallel-controlled-process, to complete the design. To complete the function simulation and verification of the presented architecture of Sequencer, the Field Programmable Gate Array（FPGA）is used for fast proto-typing for the validation. For the application specific integrated circuit design, it works under the working frequency between 400 Hz to 50M Hz with the computer simulation in using the technology of the 0.6 m process of TSMC supported by CIC. In this article, the whole function of Sequencer during measurement, and the system specification and the architecture defined by the writer are described. After all, the problems of application with the simulation results will be discussed.