An Access Stream Reordering Chip for Maximizing SDRAM Throughput
碩士 === 國立清華大學 === 資訊工程學系 === 87 === SDRAM is popular and has features such as synchronous operation, multiple internal banks, and burst mode operation. These features make the throughput dependent on the access sequence. We examine the dependence and propose a memory controller for maximi...
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1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/60924504127881824444 |
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ndltd-TW-087NTHU03920402015-10-13T11:46:55Z http://ndltd.ncl.edu.tw/handle/60924504127881824444 An Access Stream Reordering Chip for Maximizing SDRAM Throughput 使SDRAM資料量最大化之存取順序重置晶片設計 Hong-Jun Chioiu 丘宏鈞 碩士 國立清華大學 資訊工程學系 87 SDRAM is popular and has features such as synchronous operation, multiple internal banks, and burst mode operation. These features make the throughput dependent on the access sequence. We examine the dependence and propose a memory controller for maximizing the system throughput by buffering and reordering a window of access stream. This controller can be used in such applications as network switch buffers in which the throughput is more important than the turnaround time of each individual access. A VLSI chip has been implemented. Youn-Long Lin 林永隆 1999 學位論文 ; thesis 31 en_US |
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NDLTD |
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en_US |
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Others
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碩士 === 國立清華大學 === 資訊工程學系 === 87 === SDRAM is popular and has features such as synchronous operation, multiple internal banks, and burst mode operation. These features make the throughput dependent on the access sequence. We examine the dependence and propose a memory controller for maximizing the system throughput by buffering and reordering a window of access stream. This controller can be used in such applications as network switch buffers in which the throughput is more important than the turnaround time of each individual access. A VLSI chip has been implemented.
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| author2 |
Youn-Long Lin |
| author_facet |
Youn-Long Lin Hong-Jun Chioiu 丘宏鈞 |
| author |
Hong-Jun Chioiu 丘宏鈞 |
| spellingShingle |
Hong-Jun Chioiu 丘宏鈞 An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| author_sort |
Hong-Jun Chioiu |
| title |
An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| title_short |
An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| title_full |
An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| title_fullStr |
An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| title_full_unstemmed |
An Access Stream Reordering Chip for Maximizing SDRAM Throughput |
| title_sort |
access stream reordering chip for maximizing sdram throughput |
| publishDate |
1999 |
| url |
http://ndltd.ncl.edu.tw/handle/60924504127881824444 |
| work_keys_str_mv |
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