Implementation and Design of A Mixed Radix-8/4/2 64b/32b Integer Divider
碩士 === 國立中山大學 === 電機工程學系 === 87 === Integer division is generally regarded as an infrequent instruction, which takes most execution cycles in typical microprocessor operations.However, it is still very much needed in the modern microprocessors.Since the modern microprocessors employ the s...
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| Format: | Others |
| Language: | zh-TW |
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1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/53633626594099290126 |
| Summary: | 碩士 === 國立中山大學 === 電機工程學系 === 87 === Integer division is generally regarded as an infrequent instruction, which takes most execution cycles in typical microprocessor operations.However, it is still very much needed in the modern microprocessors.Since the modern microprocessors employ the super-scalar architecture generally, the effect of the inefficient division operation on overall system performance will be as much as that of the adder and the multiplier.
This thesis present the design and implementation of an mixed radix-8/4/2 integer divider that is based on the floating-point digit recurrence division algorithm. Its major objective is to overcome the problem in the algorithm theory and physical design. We are going to prove its correctness functions and improve its performance. We also implement a 64/32 bit integer divider chip.
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