High Performance Circuits Design for 1.5V Dynamic Random Access Memory
碩士 === 國立中山大學 === 電機工程學系 === 87 === Four low power and high speed circuits for a 1.5V high performance DRAM are presented in this thesis. First, a modified low power and high speed flip-flop is proposed. A NMOS transistor is inserted into the master latch of the proposed flip-flop so as...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1999
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/32086053042268761651 |