The Complete System Design and Implementation of Flash Disk Controller
碩士 === 國立交通大學 === 電機與控制工程系 === 87 === The theme of this thesis is mainly the description of the design and realization of a kind of data storage device. The main purpose of it is to store data in flash memory through a controller while errors can be located and corrected automatically. Th...
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ndltd-TW-087NCTU05911062016-07-11T04:13:50Z http://ndltd.ncl.edu.tw/handle/38584543218394580125 The Complete System Design and Implementation of Flash Disk Controller 快閃記憶體式硬碟機控制器之完整系統設計與實現 Khein-Seng Pua 潘健成 碩士 國立交通大學 電機與控制工程系 87 The theme of this thesis is mainly the description of the design and realization of a kind of data storage device. The main purpose of it is to store data in flash memory through a controller while errors can be located and corrected automatically. This report’s content covers the design theory and the methods of the interface in hard disk drives as well as the management of flash memory. The interface in hard disk drives adopt ATA-4 standard and the transfer rate of it can reach up to 16.6MB/Sec. In the controller there is a 8051 single-chip micro-processor which is responsible for monitoring host interfaces’ signal transfer agreement while execute the calculation of the flash memory, which is intentionally to evenly average the life cycle of the flash memory in an effective way and at the same time expedite the transfer rate of the system. And the content also describes all kinds of test methods and results in order to verify the achievement rate of this research. Bing-Fei Wu 吳炳飛 1999 學位論文 ; thesis 58 zh-TW |
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碩士 === 國立交通大學 === 電機與控制工程系 === 87 === The theme of this thesis is mainly the description of the design and realization of a kind of data storage device. The main purpose of it is to store data in flash memory through a controller while errors can be located and corrected automatically. This report’s content covers the design theory and the methods of the interface in hard disk drives as well as the management of flash memory. The interface in hard disk drives adopt ATA-4 standard and the transfer rate of it can reach up to 16.6MB/Sec. In the controller there is a 8051 single-chip micro-processor which is responsible for monitoring host interfaces’ signal transfer agreement while execute the calculation of the flash memory, which is intentionally to evenly average the life cycle of the flash memory in an effective way and at the same time expedite the transfer rate of the system. And the content also describes all kinds of test methods and results in order to verify the achievement rate of this research.
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Bing-Fei Wu |
author_facet |
Bing-Fei Wu Khein-Seng Pua 潘健成 |
author |
Khein-Seng Pua 潘健成 |
spellingShingle |
Khein-Seng Pua 潘健成 The Complete System Design and Implementation of Flash Disk Controller |
author_sort |
Khein-Seng Pua |
title |
The Complete System Design and Implementation of Flash Disk Controller |
title_short |
The Complete System Design and Implementation of Flash Disk Controller |
title_full |
The Complete System Design and Implementation of Flash Disk Controller |
title_fullStr |
The Complete System Design and Implementation of Flash Disk Controller |
title_full_unstemmed |
The Complete System Design and Implementation of Flash Disk Controller |
title_sort |
complete system design and implementation of flash disk controller |
publishDate |
1999 |
url |
http://ndltd.ncl.edu.tw/handle/38584543218394580125 |
work_keys_str_mv |
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