| Summary: | 碩士 === 國立交通大學 === 電子工程系 === 87 === Recently, the flash memory has received much attention for application to the digital cameras and hand-held computers as a portable mass storage. In the past, n-channel flash cells were used in the design of flash memory products. However, the requirement of high voltage operation for channel-hot-electron program results in a large power consumption. On the other hand, p-channel flash cells can achieve the advantage of low power operation by using band-to-band tunneling induced hot electron injection (BTB) as programming method, and this makes p-channel cells become the future trend of flash memories.
In this thesis, a comprehensive study of n- and p-channel flash cells in terms of performance and reliability is presented. The degradation mechanisms of hot-carrier induced reliability problems in n- and p-channel flash cells are also investigated. Although the n-channel flash cell exhibits higher electron mobility, the p-channel flash cell is most advantageous with features such as better reliability and lower power consumption. These meet the scaling trend such that it is a promising candidate for the future flash memory applications. However, p-channel flash memory has serious drain disturb problem. Therefore, the drain-disturb issue has been studied extensively. Here, we propose two approaches to improve the drain disturb of p-channel flash cell. One is by using Double-Diffused Drain (DDD) structure to decrease junction gate current injection, and the other one is by choosing DINOR or NAND structure. These can be used as a design guideline for flash memory device and circuit designers.
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