Formation of NiSi and NiSi Silicided Junction Diodes
碩士 === 國立交通大學 === 電子工程系 === 87 === This thesis studies the material properties and process technologies of nickel silicide relevant to VLSI applications. The process window for the formation of good quality NiSi films on single crystalline silicon substrate ranges from 400 to 600 oC. The...
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ndltd-TW-087NCTU04280422016-07-11T04:13:35Z http://ndltd.ncl.edu.tw/handle/86476269667247087715 Formation of NiSi and NiSi Silicided Junction Diodes 矽化鎳之製備及NiSi/p+n接面二極體的之研究 Gen-Da You 游正達 碩士 國立交通大學 電子工程系 87 This thesis studies the material properties and process technologies of nickel silicide relevant to VLSI applications. The process window for the formation of good quality NiSi films on single crystalline silicon substrate ranges from 400 to 600 oC. The optimal process for the formation of silicide contacted NiSi/p+n junction diodes with a junction depth of 0.3 m, is a 30 min furnace annealing at 500 oC, and the leakage current density of the resultant diodes was found to be 12.7 nA/cm2. For the samples of Ni/(doped) poly-Si/SiO2/Si structure, thermal annealing in furnace for 30 min at 500 oC or RTA annealing for 1 min at 450 oC resulted in a NiSi-polycide MOS capacitor of optimum I-V characteristics and charge-to-breakdown. For the NiSi/p+n shallow junction diodes fabricated using implant through silicide scheme, BF2+ implantation at 60 KeV to a dose of 1x1015 cm-2 followed by a 30 min 700 oC furnace anneal resulted in NiSi/p+n shallow junction diodes having a junction depth less than 0.15 m and with the reverse bias leakage current density as low as 20 nA/cm2. Mao-Chieh Chen 陳茂傑 1999 學位論文 ; thesis 92 en_US |
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碩士 === 國立交通大學 === 電子工程系 === 87 === This thesis studies the material properties and process technologies of nickel silicide relevant to VLSI applications. The process window for the formation of good quality NiSi films on single crystalline silicon substrate ranges from 400 to 600 oC. The optimal process for the formation of silicide contacted NiSi/p+n junction diodes with a junction depth of 0.3 m, is a 30 min furnace annealing at 500 oC, and the leakage current density of the resultant diodes was found to be 12.7 nA/cm2. For the samples of Ni/(doped) poly-Si/SiO2/Si structure, thermal annealing in furnace for 30 min at 500 oC or RTA annealing for 1 min at 450 oC resulted in a NiSi-polycide MOS capacitor of optimum I-V characteristics and charge-to-breakdown. For the NiSi/p+n shallow junction diodes fabricated using implant through silicide scheme, BF2+ implantation at 60 KeV to a dose of 1x1015 cm-2 followed by a 30 min 700 oC furnace anneal resulted in NiSi/p+n shallow junction diodes having a junction depth less than 0.15 m and with the reverse bias leakage current density as low as 20 nA/cm2.
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author2 |
Mao-Chieh Chen |
author_facet |
Mao-Chieh Chen Gen-Da You 游正達 |
author |
Gen-Da You 游正達 |
spellingShingle |
Gen-Da You 游正達 Formation of NiSi and NiSi Silicided Junction Diodes |
author_sort |
Gen-Da You |
title |
Formation of NiSi and NiSi Silicided Junction Diodes |
title_short |
Formation of NiSi and NiSi Silicided Junction Diodes |
title_full |
Formation of NiSi and NiSi Silicided Junction Diodes |
title_fullStr |
Formation of NiSi and NiSi Silicided Junction Diodes |
title_full_unstemmed |
Formation of NiSi and NiSi Silicided Junction Diodes |
title_sort |
formation of nisi and nisi silicided junction diodes |
publishDate |
1999 |
url |
http://ndltd.ncl.edu.tw/handle/86476269667247087715 |
work_keys_str_mv |
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