An Architecture-Driven Metric for simultaneous Placement and Global Routing for FPGAs
碩士 === 國立交通大學 === 資訊科學系 === 87 === Due to their low prototyping cost, user programmability and short turnaround time, Field Programmable Gate Arrays (FPGAs) have become a very popular design style for ASIC applications. FPGA routing resources typically consist of wire segments and program...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/56246724336279663144 |