Design and Analysis of Generic Universal Switch Blocks
碩士 === 國立交通大學 === 資訊科學系 === 87 === A switch block M with W terminals on each side is said to be universal if every set of nets satisfying the dimension constraint (i.e., the number of nets on each side of M is at most W) is simultaneously routable through M. In this thesis, we present an...
| Main Authors: | , |
|---|---|
| Other Authors: | |
| Format: | Others |
| Language: | en_US |
| Published: |
1999
|
| Online Access: | http://ndltd.ncl.edu.tw/handle/80905779263703106810 |