Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing

碩士 === 國立中興大學 === 電機工程學系 === 87 === Asynchronous Transfer Mode (ATM) has been adopted as the transport and switching mechanism for B-ISDN. Crossbar nonblocking packet switches are widely used as the fundamental architecture for ATM switch. This thesis studies an N N nonblocking packet swi...

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Main Authors: Yu Chien Lu, 呂育健
Other Authors: Dye Jyun Ma
Format: Others
Language:en_US
Published: 1999
Online Access:http://ndltd.ncl.edu.tw/handle/04911433487459979967
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spelling ndltd-TW-087NCHU04420032015-10-13T17:54:32Z http://ndltd.ncl.edu.tw/handle/04911433487459979967 Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing ATM交換器輸入端優先權控制策略之效益模型 Yu Chien Lu 呂育健 碩士 國立中興大學 電機工程學系 87 Asynchronous Transfer Mode (ATM) has been adopted as the transport and switching mechanism for B-ISDN. Crossbar nonblocking packet switches are widely used as the fundamental architecture for ATM switch. This thesis studies an N N nonblocking packet switch with input queues and two priority classes of cells which can be used to support traffic with different QoS requirements. Two queueing policies (push out and partition buffer sharing) are studied here. Under both policies, packets of high priority and low priority classes are queued when waiting for service, and high priority packets prevail over low priority packets at the inputs as well as the outputs. In the push out policy, high priority packets and low priority packets can enter the input buffer when the input buffer is not full. When the input buffer is full, only high priority packets can enter the queue by forcing out low priority packets in the queue. In the partition buffer sharing policy, high priority packets can enter the input buffer when the input buffer is not full. Low priority packets can enter the input buffer when the current occupancy of input buffer has not reached a pre-specified threshold. An approximate two-dimensional Markov-chain model is developed for studying the performance under both policies, based on some independence assumptions and by using an equivalent queueing system to estimate the services capability seen by each input. From this model, we obtain the throughput, packet drop probability, and queue length distribution of high priority and low priority packets. The results are verified with simulation. Dye Jyun Ma 馬代駿 1999 學位論文 ; thesis 60 en_US
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description 碩士 === 國立中興大學 === 電機工程學系 === 87 === Asynchronous Transfer Mode (ATM) has been adopted as the transport and switching mechanism for B-ISDN. Crossbar nonblocking packet switches are widely used as the fundamental architecture for ATM switch. This thesis studies an N N nonblocking packet switch with input queues and two priority classes of cells which can be used to support traffic with different QoS requirements. Two queueing policies (push out and partition buffer sharing) are studied here. Under both policies, packets of high priority and low priority classes are queued when waiting for service, and high priority packets prevail over low priority packets at the inputs as well as the outputs. In the push out policy, high priority packets and low priority packets can enter the input buffer when the input buffer is not full. When the input buffer is full, only high priority packets can enter the queue by forcing out low priority packets in the queue. In the partition buffer sharing policy, high priority packets can enter the input buffer when the input buffer is not full. Low priority packets can enter the input buffer when the current occupancy of input buffer has not reached a pre-specified threshold. An approximate two-dimensional Markov-chain model is developed for studying the performance under both policies, based on some independence assumptions and by using an equivalent queueing system to estimate the services capability seen by each input. From this model, we obtain the throughput, packet drop probability, and queue length distribution of high priority and low priority packets. The results are verified with simulation.
author2 Dye Jyun Ma
author_facet Dye Jyun Ma
Yu Chien Lu
呂育健
author Yu Chien Lu
呂育健
spellingShingle Yu Chien Lu
呂育健
Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
author_sort Yu Chien Lu
title Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
title_short Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
title_full Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
title_fullStr Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
title_full_unstemmed Performance Modeling for Two Priority Control Policies for ATM Switches with Input Queueing
title_sort performance modeling for two priority control policies for atm switches with input queueing
publishDate 1999
url http://ndltd.ncl.edu.tw/handle/04911433487459979967
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