Controlling ATPG To Improve Testability Problem Caused By Multiple-Branch
碩士 === 國立中興大學 === 資訊科學研究所 === 87 === Abstract With the increase in the complexity of VLSI circuitry, the issues of testing and design-for-testability (DFT) are becoming increasingly important. Considering testability during the early stages of the design flow can have many bene...
Main Authors: | LIEN CHIA CHUN, 連家駿 |
---|---|
Other Authors: | 王行健 老師 |
Format: | Others |
Language: | zh-TW |
Published: |
1999
|
Online Access: | http://ndltd.ncl.edu.tw/handle/96209898483845471964 |
Similar Items
-
Multiple-Branch Testable Design
by: Ruey-Feng Chen, et al.
Published: (1999) -
Parallel ATPG using Multiple Threads
by: Wen-Yi Luo, et al.
Published: (2011) -
Low Capture Power ATPG
by: Chia-Cheng HE, et al.
Published: (2011) -
On Enhancing Deterministic Sequential ATPG
by: Duong, Khanh Viet
Published: (2014) -
An ATPG for State Transition Sequences of Interactive FSMs
by: Chia-Chih Yen, et al.
Published: (2000)