| Summary: | 碩士 === 國立中興大學 === 資訊科學研究所 === 87 === Abstract
With the increase in the complexity of VLSI circuitry, the issues of testing and design-for-testability (DFT) are becoming increasingly important. Considering testability during the early stages of the design flow can have many benefits, including significantly improved fault coverage, reduced test hardware overhead, and reduced design iteration times. In this paper, We present a method that modifies the original behavioral code to deal with the testability problems caused by conditional case statement under Built-In Self-Test (BIST) environment. We will develop solutions for the problems under high-level design environment.
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