| Summary: | 碩士 === 中原大學 === 資訊工程學系 === 87 === Retiming is an important optimization technique to minimize the clock period and/or area by relocating registers in sequential circuits. In previous research about retiming, we often assume initial states of registers as don’t care[3][4][20][21] in the original circuits. Whenever the initial state of a sequential circuit is meaningful, e.g., for controllers, we have to compute an equivalent initial state so that the retimed circuit has the same behavior as the original circuit.
In the thesis, we formulate a new problem for initial state computation for a set of retimed circuits having the same corresponding reduced finite state machine, and propose a new adaptive algorithm to solve it. The retimed circuit discussed in this thesis can be any circuit with forward and/or backward retiming or even with circuit replication, and our algorithm all can efficiently compute equivalent initial states.
The proposed new adaptive algorithm based on homing sequence technique can efficiently compute an equivalent state of the retimed circuit whenever the initial state of the original circuit can be reached from some final states corresponding to some homing sequences of the corresponding finite state machine. However, there is no path from determined final states to the initial state of the original circuit, if the retimed circuit is only composed of AND、OR gates and registers, an equivalent initial state can be efficiently computed by binary search. Simultaneously, for the circuits with initial state assignments by allowing some registers with unspecified initial values, our algorithm is still performed well.
Experimental results show that our algorithm can efficiently compute equivalent initial states for any circuit.
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