GEMCAB：A Benchmark Circuit for Design for Testability
碩士 === 中華大學 === 電機工程學系碩士班 === 87 === The original intent of DFT(Design For Test) is to solve the problem in IC development. But it may produce another problem after we solve one. The problems of clock skew and bus contention always suffered from the design after DFT are proceeded. In this...
| Main Authors: | , |
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| Other Authors: | |
| Format: | Others |
| Language: | zh-TW |
| Published: |
1999
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| Online Access: | http://ndltd.ncl.edu.tw/handle/78486425361238058252 |