Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System

碩士 === 國立中正大學 === 電機工程研究所 === 87 === The design and implementation of an Adaptive Decision Feedback Equalizer(ADFE) applicable to the receiver of the HIPERLAN(High Performance Radio LAN) system is investigated. computer simulations are used to design the parameters of the proposed equaliz...

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Main Authors: Denis, 黃育民
Other Authors: Wern-Ho Sheen
Format: Others
Language:zh-TW
Published: 1999
Online Access:http://ndltd.ncl.edu.tw/handle/73813101816148877589
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spelling ndltd-TW-087CCU004420572016-02-03T04:32:14Z http://ndltd.ncl.edu.tw/handle/73813101816148877589 Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System 高速無線區域網路可適應性等化器之設計與製作 Denis 黃育民 碩士 國立中正大學 電機工程研究所 87 The design and implementation of an Adaptive Decision Feedback Equalizer(ADFE) applicable to the receiver of the HIPERLAN(High Performance Radio LAN) system is investigated. computer simulations are used to design the parameters of the proposed equalizer architecture, including number of taps, step size, and the word length of input signal and coefficients of equalizer, from the standpoint of HIPERLAN physical layer performance. In addition, SPW(Signal Processing WorkSystem) is employed to verify the equalizer algorithm and architecture, and then the RTL codes are optimized and transferred by VA(Visual Architect) for the gate level circuit implementation of equalizer from a hardware standpoint. Wern-Ho Sheen 沈文和 1999 學位論文 ; thesis 62 zh-TW
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language zh-TW
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sources NDLTD
description 碩士 === 國立中正大學 === 電機工程研究所 === 87 === The design and implementation of an Adaptive Decision Feedback Equalizer(ADFE) applicable to the receiver of the HIPERLAN(High Performance Radio LAN) system is investigated. computer simulations are used to design the parameters of the proposed equalizer architecture, including number of taps, step size, and the word length of input signal and coefficients of equalizer, from the standpoint of HIPERLAN physical layer performance. In addition, SPW(Signal Processing WorkSystem) is employed to verify the equalizer algorithm and architecture, and then the RTL codes are optimized and transferred by VA(Visual Architect) for the gate level circuit implementation of equalizer from a hardware standpoint.
author2 Wern-Ho Sheen
author_facet Wern-Ho Sheen
Denis
黃育民
author Denis
黃育民
spellingShingle Denis
黃育民
Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
author_sort Denis
title Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
title_short Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
title_full Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
title_fullStr Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
title_full_unstemmed Design and Implementation of an Adaptive Decision Feedback Equalizer for High Speed Wireless Local Area Network System
title_sort design and implementation of an adaptive decision feedback equalizer for high speed wireless local area network system
publishDate 1999
url http://ndltd.ncl.edu.tw/handle/73813101816148877589
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