Analysis and Applications of Pass-Transistor/ CMOS Collaborated Logic

• Main Authors: Lin Teng-Yuan, 林鼎源
• Other Authors: Cheng-Ching Huang
• Format: Others
• Language: zh-TW
• Published: 1998
• Online Access: http://ndltd.ncl.edu.tw/handle/09404824821994602851

碩士 === 大同工學院 === 電機工程研究所 === 86 === This thesis focuses on the analysis and application of PCCL. The PCCL is especially used in low-power VLSI and a universal gate. We try to implement a set of logic functions and discuss the waveforms attenuated by pass-transistors. We discuss the technique improved by inverter-restoring and the waveform can be restored to at 500 MHz operation frequency. We try to replace the level-restoring circuit of PCCL by inverter-latch one. Finally, we don't implement by BDD, but implement by AND and OR gates of convWe simulate the critical-path waveform by HSPICE. The process parameters adopt the UMC 0.5 process for education. In the fixed process, The result of power-delay-product improves to nearly 1/3 compared with CMOS logic-style in high process.